Computation Structures 3: Computer Organization
Chris Terman, Steve Ward and Silvina Hanono Wachman via edX
- 0
- 10 weeks long
- edX
- English
Course Overview
Digital systems are at the heart of the information age in which we live, allowing us to store, communicate and manipulate information quickly and reliably. This computer science course is a bottom-up exploration of the abstractions, principles, and techniques used in the design of digital and computer systems. If you have a rudimentary knowledge of electricity and some exposure to programming, roll up your sleeves, join in and design a computer system!
This is Part 3 of a 3-part series on digital systems, providing an introduction to the hardware/software interface and is based on a course offered by the MIT Department of Electrical Engineering and Computer Science. Topics include pipelined computers, virtual memories, implementation of a simple time-sharing operating system, interrupts and real-time, and techniques for parallel processing.
Using your browser for design entry and simulation, you’ll optimize your processor design from Part 2 for size and speed, and make additions to a simple time-sharing operating system.
Learner Testimonial
"Out of the many edX courses I have taken, the first two parts of 6.004x were clearly the best. I am looking forward to the third part.” -- Previous Student
Course Circullum
- Pipelined Beta: pipelined execution of instructions, data and control hazards, resolving hazards using bypassing, stalling and speculation.
- Virtual Memory: extending the memory hierarchy, paging using hierarchical page maps and look-aside buffers, contexts and context switching, integrating virtual memories with caches.
- Operating Systems: processes, interrupts, time sharing, supervisor calls.
- Devices and Interrupts: device handlers asynchronous I/O, stalling supervisor calls, scheduling, interrupt latencies, weak and strong priority systems.
- Processes, Synchronization and Deadlock: inter-process communication, bounded buffer problem, semaphores for precedence and mutual exclusion, semaphore implementation, dealing with deadlock.
- Interconnect: the truth about wires, point-to-point vs. shared interconnect, communication topologies.
- Parallel Processing: instruction-, data- and thread-level parallelism, Amdahl’s Law, cache coherency.
- Labs: optimizing your Beta design for size and speed, emulating instructions, extending a simple time-sharing operating system.
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This Course Include:
- Pipelined Beta: pipelined execution of instructions, data and control hazards, resolving hazards using bypassing, stalling and speculation.
- Virtual Memory: extending the memory hierarchy, paging using hierarchical page maps and look-aside buffers, contexts and context switching, integrating virtual memories with caches.
- Operating Systems: processes, interrupts, time sharing, supervisor calls.
- Devices and Interrupts: device handlers asynchronous I/O, stalling supervisor calls, scheduling, interrupt latencies, weak and strong priority systems.
- Processes, Synchronization and Deadlock: inter-process communication, bounded buffer problem, semaphores for precedence and mutual exclusion, semaphore implementation, dealing with deadlock.
- Interconnect: the truth about wires, point-to-point vs. shared interconnect, communication topologies.
- Parallel Processing: instruction-, data- and thread-level parallelism, Amdahl’s Law, cache coherency.
- Labs: optimizing your Beta design for size and speed, emulating instructions, extending a simple time-sharing operating system.
- Provider:edX
- Certificate:Not Avalible
- Language:English
- Duration:10 weeks long
- Language CC:English